1. Field of the Invention
This invention is related to the field of integrated circuits and, more particularly, to command processing in a peripheral component in an integrated circuit.
2. Description of the Related Art
In a peripheral interface controller that has significant data bandwidth, one of the challenges that can occur is providing the control input to the peripheral interface controller from an external processor. Typically, the same internal interface to the peripheral controller that transfers data between the peripheral interface controller and memory is used to provide the control input from the external processor (e.g. via a series of writes to control registers in the peripheral interface controller). While the data transfers are occurring, the memory to peripheral interface can be saturated with the data transfers. Accordingly, control inputs to arrange for the next set of data transfers can be effectively locked out until the current data transfers complete. During the time that the control inputs are being provided, the external peripheral interface controlled by the peripheral interface controller can be idle.
One mechanism for reducing the contention on the peripheral to memory interface is to include a processor in the peripheral interface controller, executing a program to control the peripheral interface controller hardware. However, such a mechanism is expensive in a number of ways: in monetary terms to acquire the processor (either as a discrete component or as intellectual property that can be incorporated into the peripheral interface controller design); in terms of space occupied by the peripheral interface controller when the processor is included; and in terms of power consumed by the processor. Additionally, the program to be executed is stored in the system memory, and thus instruction fetches can compete with the data transfers on the peripheral to memory interface.
In some cases, a peripheral interface controller can detect erroneous operation, and can report the error. For example, the peripheral interface controller can interrupt the processor that programmed the peripheral interface controller or a processor functioning as a central processing unit (CPU) in the system. Alternatively, the peripheral interface controller can record the error in a register or other facility that can be read by software executing on one of the processors. Once software is aware of the error, it generally must ascertain what sequence of operations has occurred to cause the error.